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My questions are about the relation between the size of an actual/physical address and the size of the address bus.

  1. If I understand correctly, the actual/physical address size is determined during designing the computer architecture.
  2. Must the size of the address bus be the same as the number of bits in an address? If no, does it mean that a physical address must be transmitted through a smaller address bus more than once?

Note

  • I am not talking about the word size (i.e. the size the CPU can process at one time), which can be different from both the actual/physical address size and the address bus size.
  • I am not talking about using segment and offset addresses to represent a physical address either.
MoonSire
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Tim
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2 Answers2

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The physical address bus' bit width can be more or less then the bit width in a particular memory address, as there is all kinds of hardware hacks you can design into a system to allow weird addressing modes. For example, in some 32-bit systems, the address bus is 52-bits wide. As another example, some CPU instructions can decode a longer address by using a combination of a base address and a lookup table.

At the end of the day, it's the hardware's job to interpret a memory address from a CPU. The CPU just computes the memory address it needs, and sends it to the motherboard's memory controller (remember, we're talking hardware, not software here, see my final note at the bottom). The memory controller's job is to interpret that address, and put the appropriate data on the memory bus.

Since this is all handled on a hardware level, you can actually increase the physical address space of some lower-bit memory systems using a physical address extension. Again, how these extended addresses are handled is part of how the system/hardware was implemented.

Finally, to give some more merit to the hardware hacks I mentioned above, one good example is memory-mapped input/output (MMIO for short). This allows a CPU to access both peripherals and RAM through the address bus itself. Usually this is done though the higher-order memory addresses to avoid lower-order address conflicts. However, this gave rise to the commonly known 3 GB Memory Barrier in all consumer variants of 32-bit Windows operating systems. Again, this is just to show you what is possible on a hardware level.

From a high-level programmer's perspective, this has nothing to do with pointer variables. They always have the same data size, since these address extensions are handled for you by the operating system and/or the hardware itself. Pointer sizes, addresses, and offsets are set/computed by the compiler.

Breakthrough
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  • Thanks! (1) in your last paragraph, what differences are between "pointer variables" and "pointer sizes"? You mentioned they are handled at different levels. (2) I wonder where you learn these things? Are there references like textbooks, websites? – Tim Aug 04 '11 at 01:32
  • (3) Must a physical address be transmitted through a smaller address bus more than once? – Tim Aug 04 '11 at 01:34
  • I learned a lot of this from both school and self-directed learning (I never read it, but I heard this was an awesome resource). If you need a quick but advanced technical dictionary, check this out. Other then that, if you're curious about anything, Google will take you to those strange places in the internet you never knew existed ;) – Breakthrough Aug 04 '11 at 01:38
  • (1) A pointer variable represents a memory address to an arbitrary data type (said to be the type of the pointer). A pointer size is usually the same size (in bytes) on any system, regardless of the underlying data type's size, since it just represents a memory address.

    (2) Learn assembly on a micro-controller, it will teach you more then you want to know about a computer. I learned most of this from my microprocessors and microcomputers course (we used a Motorola 68HC12).

     – Breakthrough Aug 04 '11 at 01:42
  • I mention the 68HC11/12 in particular, because there's a lot of good textbooks for it, and the concepts still apply to modern high-performance computers. Also, it's a smaller 8-bit processor, so it is easy to learn what all the parts of it do (and it's fun to watch it all change with a debugger). All of those parts scale up to the big computers we use every day.

    (3) No, what usually happens here is the memory controller puts the lower order bits on the address bus. It then uses the higher order bits to select the individual memory module to grab the data from.

     – Breakthrough Aug 04 '11 at 01:43
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    @Tim sorry to keep spamming you with comments, but here is the reference manual for that microcontroller I mentioned. It goes through a lot of useful information in regards to how the processor is laid out, how to address things, etc. I will admit though, it helps to know something about microcontrollers or assembly language before starting to read that, although you could probably learn as you go through it. – Breakthrough Aug 04 '11 at 01:48
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One thing to understand is that all larger modern computers are memory mapped. The program "address space" (essentially determined by the size of a pointer) can be larger or smaller than the physical address space (as determined by the amount of RAM that can possibly be addressed). In-between sits one or several layers of address mapping logic that convert from "logical" to "physical" addresses. This supports virtual memory "paging" (where a particular memory page may be "paged out" to a disk drive when it's not been recently referenced) and it also supports allowing multiple processes/tasks each have their own "address space".

In addition to the above (and especially on microprocessors where pins are limited) the address "bus" that runs out of the processor to the memory bank may be "multiplexed" such that addresses are sent out in two separate cycles, first the high half, eg, then the low half. In fact, some memory modules are built with this in mind, since they likewise "multiplex" addresses coming in.

Daniel R Hicks
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    Virtual memory (and paging) is implemented in software by the operating system, and is independent of how the hardware implements logical/physical address translations. – Breakthrough Aug 04 '11 at 02:28
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    Implemented in the OS, yes, but far from independent from the address translation mechanism. At a minimum, you can't have virtual memory and paging without some sort of address translation mechanism, and the mechanism dictates page size and a number of other attributes of the memory model. – Daniel R Hicks Aug 04 '11 at 02:59