how cpu decide memory-reorder around branch instruction

Asked Jun 19 '21 at 08:21

Active Jun 19 '21 at 13:09

Viewed 15 times

if a Load/Store following a branch instruction (eg. test/cmp/jmp)

how memory reorder handle ?

is a Load/Store can be reordered before/after these branch instruction ?

because the correctness may volatile.

a better simple but maybe slow method is branch instruction like a mfence, which prevent both side of reorder.

edited Jun 19 '21 at 13:09

asked Jun 19 '21 at 08:21

Chinaxing

You should probably tag this [cpu-architecture] as well. Looks like a duplicate of [Can a speculatively executed CPU branch contain opcodes that access RAM?](https://stackoverflow.com/q/64141366) which describes how a store buffer decouples speculative OoO exec from global visibility (to other cores) which must not be speculative. – Peter Cordes Jun 19 '21 at 09:57

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