Is anyone aware of the source for a technique that incorporates external wire values into Garbled Circuits? I have come across this technique, which can be found here. However, I was unable to locate the primary reference for it.
The purpose of this technique is to reduce the number of decryption operations required during the evolution phase. By incorporating external wire values into Garbled Circuits, the technique aims to optimize the process and improve efficiency. Unfortunately, the primary reference for this technique is currently unknown.